Scrolling text Physical design : Bengaluru (Offline) : Regular Classes will commence in the first week of May 2025    ||   ASIC Verification Demo class (DV) : Bengaluru (Offline/Online) : 27th April 2025

Physical Design

At Semicon TechnoLabs, our success in physical design and silicon realization comes from not just our significant platform of compute resources and EDA infrastructure, but also from our experienced team of engineers who are dedicated to providing high-quality services.

Our Specifications:-

  • Gate-Level Netlist.
  • Sythesis & pre-layout STA.
  • Clock -Tree-Synthesis.
  • Floorplan.
  • Placement.
  • DFM (Design for manufacturing) & PV.
  • Routing.
  • Post -layout STA.
  • Partitioning.
  • Fabrication.
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